High-Level VLSI Synthesis

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High-Level VLSI Synthesis
Springer Nature
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The time has come for high-level synthesis. When research into synthesizing hardware from abstract, program-like deÂ- scriptions started in the early 1970’ s, there was no automated path from the registerÂ- transfer design produced by high-level synthesis to a complete hardware impleÂ- mentation. As a result, it was very difficult to measure the effectiveness of highÂ- level synthesis methods; it was also hard to justify to users the need to automate architecture design when low-level design had to be completed manually. Today’s more mature CAD techniques help close the gap between an automatÂ- ically synthesized design and a manufacturable design. Market pressures encourÂ- age designers to make use of any and all automated tools. Layout synthesis, logic synthesis, and specialized datapath generators make it feasible to quickly impleÂ- ment a register-transfer design in silicon,leaving designers more time to consider architectural improvements. As IC design becomes more automated, customers are increasing their demands; today’s leading edge designers using logic synthesis systems are training themselves to be tomorrow’s consumers of high-level syntheÂ- sis systems. The need for very fast turnaround, a competitive fabrication market WhlCh makes small-quantity ASIC manufacturing possible, and the ever growing co:nÂ- plexity of the systems being designed, all make higher-level design automaton inevitable.

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